Logic Design Engineer

Job ID: JR0189459 Job Category: Engineering Primary Location: Phoenix, AZ US Other Locations: US, California, Folsom;US, California, San Jose;US, California, Santa Clara;US, Oregon, Hillsboro;US, Texas, Austin Job Type: Experienced Hire

Logic Design Engineer

Job Description

Come and join us.

Intel is seeking highly qualified candidates to join our Datacenter and AI group (DCAI) as a Logic Design Engineer .

QAT (Quick Assist Technology) hardware design team enables Data Center Technology thru a set of scalable hardware accelerators, like lossless compression, network security like secure key establishment, IPSec, SSL/TLS, and firewall and data center virtualization technology.

Within our QAT team, you will be a member of the CPM (Content Processing Module) front end design team, where you will work on RTL/DFX development and integration activities within the Custom Logic ASIC Engineering group in DCAI.

You will play a key role in development and integration of IPs into Intel based SoC.

You will work with the IP/SoC integration teams and collaborate with the SoC design, validation, and emulation teams to ensure successful integration and validation of IPs.

Responsibilities will include, but are not limited to:

• Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.

• Participate in the development of Architecture and Microarchitecture specifications for the Logic components.

• Provide IP integration support to SoC customers and represents RTL team.

• Implement RTL in System Verilog, validating the design, synthesizing the design, and closing timing.

• High-level Architecture through to the details of timing.

• Work with specifications at multiple levels, including the HAS and MAS (microarchitecture spec).

• Balance design trade-offs with modularity, scalability, DFX requirements, power, area, and performance.

The ideal candidate will have the following skills in addition to the qualifications listed below.

• Excellent analytical and problem-solving skills.

• Strong communication skills.

• Effective team player with continuous learning mindset and experience working with external technology companies for combined development of IPs / SOCs.

• Experience balancing multiple tasks.

• Experience working in a fast-paced environment and have as much fun and growth as possible in the process.

• Work independently and at various levels of abstraction, with strong analytical skills.

In this position you will gain invaluable experience that will allow growth and expanded opportunities across Intel.

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position.

Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience.

Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education

Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications

6+ years of total experience (PhD with 2+ or MS with 3+ will also be considered) inclusive of:

• IP / ASIC Design / Verification in Front End processes including RTL development, functional and performance verification.

• Experience in design, development, and integration of design blocks (IP) for system-on-chip (SoC) components.

• Experience in Verilog and SystemVerilog based logic design.

Preferred Qualifications

Experience in one or more of the following:

• Synthesis flow and timing closure

• Perl and/or C++ programming

• Formal Property Verification (FPV)

• Performance, power, and cost optimization

• PCIe, USB, AMBA standards (OCP, AXI, AHB, etc.)

• SOC/IP physical design methodology and communication.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera.

As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today.

Combining Altera’s industry-leading FPGA technology and customer support with Intel’s world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency.

PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation.

We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees.

That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, California, Folsom;US, California, San Jose;US, California, Santa Clara;US, Oregon, Hillsboro;US, Texas, Austin

Intel Corporation will require all new U.S.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.