Apple: Senior Gpu Physical Design Engineer

SummaryPosted: Jun 30, 2021Role Number:200262660Do you love creating elegant solutions to highly complex challenges?

Do you intrinsically see the importance in every detail?

As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient Graphics Processors(GPUs).

You’ll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions.

Joining this group means you’ll be crafting and building the technology that fuels Apple’s devices.

Together, we enable our customers to do all the things they love with their devices.

In this highly visible role, you will be responsible for building the most challenging partitions in the GPU from RTL to tapeout while mentoring and overseeing the work of more junior engineers.Key QualificationsYou will have 10+ years’ of proven experience in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place and Route and all aspects of timing, electrical and physical signoff.Proven ability to work with multi-functional teamsMentor junior engineers, guide them in problem solving and oversee signoffTechnical leadership, drive PPA recipes across the teamWork with FE and Architecture team to understand chip architecture and drive physical aspects early in the design cycleFamiliar with multiple voltage domains, power gating and low power design techniquesFamiliar with hierarchical design approaches, top-down design, budgeting, timing and physical convergenceExperience with large designs (> 20M gates) with frequencies in excess of 1GHz utilizing state of the art technologiesDrive methodologies and “best known methods” to streamline physical design work, develop guidelines and checklists, drive execution, and supervise progressResolve design and flow issues related to physical design, identify potential solutions and drive executionDescriptionIn this role you will work closely with cross functional and product teams to come up with optimal chip architecture taking into account physical constraints early in the design cycle.

You will be responsible for all physical design aspects of your partition including signoff as well as provide early RTL feedback to get optimal Floorplans and push best in class PD construction and optimization recipes for performance, power and Area (PPA).

You will also collaborate to drive methodologies and “best known methods” to streamline PD work and develop guidelines and checklists.Are you a detail oriented designer ready to solve complex technical problems?

Are you ready to mentor others and be part of a world class engineering team to help chart the future of Apple’s ecosystem?

If so, we are excited to hear from you!Education & ExperienceMSEE or equivalent is required