Qualcomm Incorporated: Analog/Mixed-Signal Machine Learning Computation Ip Architect

Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringJob Overview:Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.

But this is just the beginning.

It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products.

This is the Invention Age and this is where you come in.Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.

But this is just the beginning.

It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products.

This is the Invention Age and this is where you come in.As part of Mixed Signal (MS) design group, Analog/Mixed-Signal Machine Learning Computation IP Architect will be responsible for broad system, circuit architecture design and validation flow during the development of a custom machine learning accelerator.You will be working closely with machine learning model development, embedded SW/FW teams in the implementation of new embedded machine learning solutions for voice and computer vision applications.

You will leverage existing frameworks to develop an automated flow for mapping high-level machine learning model representations onto the hardware accelerator efficiently.

You will be responsible for validating both hardware architecture and software framework design aspects of the system pre-silicon using modeling tools/emulation platforms and post silicon.Minimum QualificationsBachelor’s degree in Science, Engineering, or related field.2 years ASIC design, verification, or related work experience.Preferred QualificationsMaster’s degree in Science, Ph.D preferred, in electrical engineering, computer science or engineering, or related area.5 years in ASIC system/architecture, ML DSP SW/FW engineering, or related work experienceExperience with a machine learning hardware accelerator system architectureExperience in compiler development and optimization for hardware acceleratorsExperience in design/implementation/deployment of deep learning models for meaningful use-cases in a variety of frameworks TensorFlow, PyTorch, CaffeExperience in embedded system design, debug and validationExperience in embedded DSP SW/FW development technologiesExcellent written and verbal communication skillsStrong programming skills (PERL,PYTHON, System Verilog)Background in analog / digital ASIC design is desirableBackground in audio/voice digital signal processing technology is desirableApplicants: If you are an individual with a disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found here for assistance.

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