Cadence Design Systems
The Sr.
Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.
Candidate’s background should include a minimum of 10 years of experience in CMOS circuit design, with preferred experience for SerDes, high-speed I/O, PLL, ADC, and DAC design and development Working knowledge of a set of common SerDes standards and their electrical requirements is a plus Must have a thorough understanding of jitter and signal equalization techniques Proficient design experience in most of the following circuit blocks: ADC, DAC, Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap; and Voltage Regulators Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification Cadence tool experience, lab test experience, and design experience at >10Gbps and in